The resin-sealed semiconductor device is fabricated using a lead frame. The lead frame is produced by forming a metal plate into the desired pattern in a precision punching press or by etching. The lead frame includes a tab for fixing a semiconductor element (semiconductor chip), a support member called the die pad and a plurality of leads with forward ends (inner ends) thereof facing the periphery of the support member. The tab is supported by tab suspension leads extending from the frame portion of the lead frame.
In fabricating the resin-sealed semiconductor device with this lead frame, the semiconductor chip is fixed on the tab of the lead frame, the electrodes of the semiconductor chip and the forward ends of the leads are connected to each other by wires, respectively, and the inner end portion of each lead including the wire and the semiconductor chip is sealed with an insulative resin thereby to form a seal member (package). Then, the unrequited lead frame portion is cut off while at the same time cutting off the leads and the tab suspension leads protruded from the package.
As a resin sealed semiconductor device fabricated using the lead frame, a semiconductor device structure (non-leaded semiconductor device) is known in which a package is formed by the one-side molding on one surface of the lead frame and the leads making up external electrode terminals are exposed to one surface of the package so that no lead is intentionally projected from the peripheral surface of the package. Such semiconductor devices include SON with the leads exposed to the two side edges of one surface of the package and QFN in which the leads are exposed to the four sides of one surface of the square package.
JP-A-11-260983 discloses a method of fabricating a lead fame used for the resin sealed semiconductor device with the lower surface of the inner lead exposed from the reverse surface of the seal resin as an external terminal. This reference includes the description of a method of fabricating the lead frame with the inner lead having a tapered cross section.
In view of the trend toward a smaller semiconductor device and prevention of the bend of the lead making up an external electrode terminal, the non-leaded semiconductor device such as SON and QFN fabricated by a one-side molding is used. The non-leaded semiconductor device has a mounting surface formed by the lead surface exposed to one surface of the package, and therefore has a small packaging area as compared with the semiconductor device such as SOP (Small Outline Package) and QFP with the leads projected from the side surface of the package.
The non-leaded semiconductor device has a simple package structure in which the lower surface of the lead is exposed to the lower surface (mounting surface) of the package to have an external electrode terminal, and therefore the lead often comes off from the package. In order to make it difficult for the lead to come off from the package, the lead entering the package, i.e. the inner lead has a cross section in the shape of an inverted trapezoid (the tapered cross section described above). This inverted trapezoidal cross section is formed by etching.
JP-A-11-260983 discloses a technique for forming the inner lead by stamping. This publication points out the following fact and discloses an invention for obviating the problem point thereof.
FIG. 38 is a perspective view showing the forward end portion of the inner lead formed by etching as disclosed in JP-A-11-260983. When etching a thin metal sheet, the degree of the opening of the resist film formed in the upper surface and the lower surface of the sheet is changed. Thus, a lead having a tapered cross section can be fabricated.
The present applicant calls the lead 90 having the tapered cross section as an inverted trapezoidal section and a section approximate to such a section as an inverted trapezoid-like section.
In the prior art, the tapered cross section, i.e. the inverted trapezoid section includes an upper surface 90a of the lead 90, a lower surface 90b narrower than the upper surface 90a and a side surface 90c. The angle formed between the upper surface 90a and the side surface 90c is smaller than 90 degrees.
As described in JP-A-11-260983, the creation of an inverted trapezoidal section by etching has several disadvantages: (1) The limitation of the accuracy of the etching process makes it impossible to obtain a steady tapered section and deteriorates the yield. (2) The narrower pitch of the inner leads makes it difficult to secure the width of the inner lead and the space between the inner leads. (3) The shape of the tapered section is not stabilized thereby deteriorating the reliability of the semiconductor device.
In order to obviate these problems, according to the invention described in JP-A-11-260983, the tapered section (inverted trapezoidal section) is formed by stamping.
FIGS. 39a to 39c are a perspective view, a plan view and a right side view, respectively, of an inner lead (lead 90) having the tapered section (inverted trapezoidal section) described in JP-A-11-260983. In this structure, the upper surface of the tapered portion is increased for an increased contact area with the seal resin. Also, the seal resin circumvents under the side surface and therefore attaches more closely with a higher strength.
With the conventional lead structure having the inverted trapezoidal section described above, however, it has been found the strength for preventing the leads from coming off is decreased by the further reduction in the lead pitch, and the leads are more liable to come off from the seal member.
FIG. 40 is a sectional view schematically showing the correlation between the lead 90 having an inverted trapezoidal section and the seal resin 96 forming a seal member 95. In FIG. 40, reference character a designates the width of the upper surface 90a of the lead 90, character b the width of the lower surface 90b of the lead 90, character c the thickness (height) of the lead 90, character d the lead pitch and character e the shortest length between the leads.
Assume that a force of such a magnitude as to cause the lead 90 with the lower surface 90b exposed to come off from the seal member 95 is exerted on the mounting surface 95a corresponding to the lower surface of the seal member 95, as indicated by arrow 97. In view of the fact that the area of the seal resin corresponding to the portion having the shortest length e is smallest, the particular portion is liable to develop a crack often causing the lead 90 to come off from the seal member 95.
The strength of the seal resin 96 (the lead holding strength, i.e. the external electrode terminal strength) holding the lead 90 is higher, the longer the shortest length e between adjacent leads. With the lead pitch becoming shorter and shorter, the lead holding strength is on the decrease, so that the holding stability of the external electrode terminals of the non-leaded semiconductor device tends to decrease, thereby adversely affecting the reliability of the non-leaded semiconductor device. Also, the electronic apparatus having such a non-leaded semiconductor device is reduced in reliability.
As an example, in the case where the lead pitch d is set to 0.5 mm, the width a of the upper surface 90a of the lead 90 is about 0.3 mm, the width b of the lower surface 90b of the lead 90 is about 0.2 mm, the thickness (height) c of the lead 90 is about 0.2 mm, and the shortest length e between adjacent leads is about 0.2 mm. The larger the amount of the seal resin existing between adjacent leads (i.e. the shortest length e) which greatly contributes to the prevention of the lead from coming off, the better. In the case where the lead pitch d is 0.5 mm, however, the length e is already as short as 0.2 mm and the lead holding strength is low.
An object of the present invention is to provide a non-leaded semiconductor device having a large external electrode terminal strength and a high reliability of the terminals and a method of fabricating the same.
Another object of the invention is to provide a method of fabricating an electronic apparatus having a high packaging reliability of a packaged non-leaded semiconductor device.
The above and other objects and novel features of the invention will be made apparent by the description in this specification and the accompanying drawings.